Research Projects

Alex K. Jones

TTC

Field Programmable Gate Arrays (FPGAs) are high-volume, low-cost products targeting various markets, including consumer wireless products for which power consumption may be a primary concern. The market for FPGAs has recently increased due to its use as cheaper Application Specific Integrated Circuit (ASIC) alternatives.  Professor Alex K. Jones the University of Pittsburgh proposes to create a new reconfigurable SuperCISC Fabric and C-based design flow that provides the performance of custom hardware acceleration with ultra low power consumption that can be programmed from C code. The SuperCISC Fabric is a simpler, FPGA replacement for System-on-Chips (SoC) that provides similar performance to existing FPGA solutions with a much lower energy/power requirement. The SuperCISC Fabric may be used as an eFPGA IP block as a solution to SoC customers with hardware design components that are not well defined at the design start, but may require hardware acceleration and/or low power. It also can be applied to systems requiring upgradability to new algorithms with hardware performance and low energy requirements. The SuperCISC Compiler and SuperCISC Architecture implemented within an FPGA is able to achieve significant performance improvements. With addition of low power embedded processing with low-energy SuperCISC Fabric, similarly significant energy improvements are expected. 

NSF

Advances in optical devices and interconnects have made this technology attractive for telecommunication and high performance systems. Specifically, large optical switches are commercially available but no practical technology is yet available for buffering or processing in the optical domain. As a result, electronic packet switching and wormhole-routing remain popular in spite of their higher costs, limited bandwidth, and increased message latencies.

In this project, the Investigators propose the use of circuit switching as an efficient alternative to packet and wormhole switching for achieving high bandwidth, low latency communication in high performance parallel systems. Specifically, by establishing direct pipes between communicating processes, routing and buffering at intermediate switches can be eliminated, end-to-end protocols can be simplified, and both software and hardware overheads associated with data movement can be minimized. However, the overhead of circuit establishment can be relatively large, and the benefits of circuit switching can only outweigh its drawbacks when communication exhibits locality, and when this locality is appropriately explored. Thus, a compiler-based approach is proposed to analyze communication locality in parallel application programs. This approach exposes the communication locality to an architecture which explores it through a run-time system that manages circuit switched interconnections.

The new compiler technology for the detection and manipulation of communication patterns developed as part of this research enables parallelism in several domains outside of high performance supercomputers including chip multiprocessor systems and wireless systems. By correlating code structure with communication patterns, the proposed compiler technology also allows for the construction of tools that assist application developers in writing more efficient programs. Moreover, this project impacts several different areas of curriculum in computer science and engineering through the integration of research from this project into computer engineering curriculum and design projects. The project also promotes summer research activities related aimed at active recruitment and participation of women and under-represented minorities in higher education and research.

For more details on the project click here.

Computer Engineering Labs

• Electronic Design Automation Laboratory
• John A. Swanson Embedded Systems
• Optical Computing Systems
• Pittsburgh Integrated Circuits Analysis
• Radio-Frequency Prototyping and Measurements
• Radio-Frequency Shielded Facility
• Radio-Frequency Systems and Devices

Devices Labs

• Laser
• Opto-Electronics
• Planar Lightwave Circuits

Signals and Systems Labs

• Computer Vision and Pattern Recognition
• Applied Signal and System Analysis

Other Labs

• John A. Jurenko Computer Architecture
• John A. Swanson Computer Interfacing
• Fiber Grating and Sensor