Alex K. Jones
Associate Professor
Department of Electrical and Computer Engineering
Department of Computer Science (Secondary)
Computer Engineering Program
University of Pittsburgh
334 Benedum Hall
(412) 624-9666
(412) 624-8003 (fax)
akjones@ece.pitt.edu
 
Academics and Research
To effectively solve current and future computing problems it is not enough to develop new architectures or design automation tools. The solution must take a "top to bottom" approach finding new architectures, design tools, and even fabrication techniques to develop complete systems.

Education
  1.  Ph.D. in Electrical and Computer Engineering
     Northwestern University, 2002.
  1.  M.Sc. in Electrical and Computer Engineering
     Northwestern University, 2000.
  1.  B.Sc. in Physics, College of William and Mary, 1998.
 
Current CV [ ps | pdf ]
 
Teaching
ECE 2140:         System-on-a-Chip Design
ECE 2120:         Hardware Design Methodologies
ECE.CoE 0132: Digital System Design
ECE/CoE 0501: Digital Laboratory
ECE 2130:         VLSI CAD
 
Students
  1. •Shuyi Shao, Ph.D. Candidate - co-advised with Rami Melhem
  2. •Colin Ihrig, Ph.D. Student
  3. •Ahmed Abousamra, Ph.D. Student - co-advised with Rami     Melhem
  4. •Yong Li, M.Sc. Student
  5. •Haifeng Xu, M.Sc. Student
  6. •Bobby O’Conner, M.Sc. Student - co-advised with Zhi-Hong Mao
New/Recent Calls
 
 
Research Projects
Enabling Circuit Switching
Data Forest
Low-power Data Centers
Power/Energy Efficiency
 
Past Projects
SuperCISC Fabric
RFID Design Automation PERCS
VLIW FPGA
PACT
MATCH
 
 
Selected and Recent Publications
 
A full list of publications can be found here.
 
  1.  Y. Zhang and A. K. Jones, “Non-Uniform ‘Fat-Meshes’ for Chip Multiprocessors,” Parallel Processing Letters, Vol. 19, No. 4, 2009 -- to appear.
 
  1.  A. K. Jones, S. Shao, Y. Zhang, and R. Melhem, “Symbolic Expression Analysis for Compiled Communication,” Parallel Processing Letters, Vol. 18, No. 4, 2008, pp. 567-587.
 
  1.  A. Abousamra, R. Melhem, and A. K. Jones, “Winning with Pinning in NoC,” in Proc. of IEEE Hot Interconnects (HOTI), 2009.
 
  1.  C. J. Ihrig, G. J. Dhanabalan, and A. K. Jones, “A Low-power CMOS Thyristor Based Delay Element With Programmability Extensions,” in Proc. of GLSVLSI, 2009, pp. 297-302.
 
  1.  R. Hoare, Z. Ding, and A. K. Jones, “A Near-optimal Two-stage Hardware Scheduler for Large Cardinality Crossbar Switches,” Journal of Parallel and Distributed Computing (JPDC) - Vol. 68, No. 11, 2008, pp. 1437-1451.
 
  1.  G. Mehta, J. Stander, M. Baz, and B. Hunsaker, and A. K. Jones, “Interconnect Customization for a Hardware Fabric,” ACM Transactions on Design Automation for Electronic Systems (TODAES) - Vol. 14, No. 1, 2009, pp. 1-32, Article 11.
 
  1.   S. Dontharaju, S. Tung, J. T. Cain, L. Mats, M. H. Mickle, and A. K. Jones, “A Design
Automation and Power Estimation Flow for RFID Systems,” ACM Transactions on Design
Automation for Electronic Systems (TODAES) - Vo. 14, No.1, 2009, pp. 1-31, Article 7.
 
  1.   S. Shao, A. K. Jones, and R. Melhem, “Compiler Techniques for Efficient Communications
in Circuit Switched Networks for Multiprocessor Systems,” IEEE Transactions for Parallel and Distributed Systems (TPDS) - Vol. 20, No. 3, pp. 331-345.
 
  1.  A. K. Jones, S. Dontharaju, S. Tung, L. Mats, P. J. Hawrylak, R. R. Hoare, J. T. Cain, M. H. Mickle, “Radio Frequency Identification Prototyping,” ACM Transactions on Design Automation for Electronic Systems (TODAES), Vol. 13, No. 2, April, 2008, Article 29, DOI 10.1145/1344418.1344425.
 
  1.   A. K. Jones, R. Hoare, D. Kusic, J. Fazekas, G. Mehta, and J. Foster, “A VLIW Processor with Hardware Functions: Increasing Performance While Reducing Power,” IEEE Transactions on Circuits and Systems II, Vol. 53, No. 11, November 2006, pp. 1250-1254.
 
  1.    A. K. Jones, R. Hoare, D. Kusic, G. Mehta, J. Fazekas, and J. Foster, “Reducing Power while Increasing Performance with SuperCISC,” ACM Transactions on Embedded Computing Systems (TECS) - Vol. 5, No.3, August 2006, pp. 658-686.
 
  1.  Z. Ding, R. Hoare, A. K. Jones, R. Melhem, “Level-wise Scheduling Algorithm for Fat Tree Interconnection Networks,” Proceedings of Supercomputing (SC), 2006.
 
  1.  R. Hoare, Z. Ding, A. K. Jones, “An Area and Time Optimized Hardware Scheduler for Optimal Crossbar Scheduling in Real-time,” Proceedings of Supercomputing (SC), 2006.
 
  1.  A. K. Jones, R. Hoare, S. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J. T. Cain, M. H. Mickle, “An Automated, FPGA-based Reconfigurable, Low-Power RFID Tag,” Proceedings of IEEE/ACM Design Automation Conference (DAC), 2006.
 
Music