Ph.D. in Electrical and Computer Engineering
M.Sc. in Electrical and Computer Engineering
B.Sc. in Physics, College of William and Mary, 1998.
A. K. Jones, S. Dontharaju, S. Tung, L. Mats, P. J. Hawrylak, R. R. Hoare, J. T. Cain, M. H. Mickle, “Radio Frequency Identification Prototyping,” ACM Transactions on Design Automation for Electronic Systems, in press.
A. K. Jones, R. Hoare, S. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J. T. Cain, M. H. Mickle, “An Automated, FPGA-based Reconfigurable, Low-Power RFID Tag”, Journal of Microprocessors and Microsystems, Vol. 31, No. 2, March 2007, pp. 116-134.
S. Dontharaju, S. Tung, A. K. Jones, L. Mats, J. Panuski, J. T. Cain, and M. H. Mickle, “The Unwinding of a Protocol,” IEEE Communications Magazine - April, 2007.
A. K. Jones, R. Hoare, D. Kusic, J. Fazekas, G. Mehta, and J. Foster, “A VLIW Processor with Hardware Functions: Increasing Performance While Reducing Power,” IEEE Transactions on Circuits and Systems II, Vol. 53, No. 11, November 2006, pp. 1250-1254.
J. M. Lucas, R. Hoare, I. S. Kourtev, A. K. Jones, “Technology Mapping for Field Programmable Fate Arrays using Content-Addressable Memory (CAM),” Journal of Microprocessors and Microsystems - Vol. 30, No. 7, November, 2006, pp. 445-456.
A. K. Jones, R. Hoare, D. Kusic, G. Mehta, J. Fazekas, and J. Foster, “Reducing Power while Increasing Performance with SuperCISC,” ACM Transactions on Embedded Computing Systems (TECS) - Vol. 5, No.3, August 2006, pp. 658-686.
Z. Ding, R. Hoare, A. K. Jones, R. Melhem, “Level-wise Scheduling Algorithm for Fat Tree Interconnection Networks,” Proceedings of Supercomputing (SC), 2006.
R. Hoare, Z. Ding, A. K. Jones, “An Area and Time Optimized Hardware Scheduler for Optimal Crossbar Scheduling in Real-time,” Proceedings of Supercomputing (SC), 2006.
A. K. Jones, R. Hoare, S. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J. T. Cain, M. H. Mickle, “An Automated, FPGA-based Reconfigurable, Low-Power RFID Tag,” Proceedings of IEEE/ACM Design Automation Conference (DAC), 2006.